GOAL - Renesas RZ/T2M-RSK

GOAL - Renesas RZ/T2M-RSK

 

Introduction

Porting GOAL to Renesas RZ/T2M-RSK is in progress.

Information about the state of development, requirements, supported and upcoming features, resources and software handling are prospected in following chapters.

More information and documents are available at Renesas RZ/T2M-RSK.

Development is carried out on R9A07G075M24GBG.

Network protocols

The following network protocols are supported on RZ/T2M-RSK Arm® Cortex®-R52 single core.

Upcoming network protocols.

Please follow the links for detailed stack description.

In the first step of porting our network protocols to the new device, we focusing on single core solution only. Providing the multi-core versions of all network protocols is scheduled.

Features

  • FreeRTOS Kernel v10.3.0

  • Flexible Software Package (FSP) | Renesas v2.2.0

  • UART interface for log messages

  • Serial Peripheral Interface

  • 4 user LEDs (green, yellow + two red)

  • 8 user DIP switches

  • 2 user buttons

  • support for storing CM variables remanent:

    • sflash via xSPI0

    • EEPORM via I2C

  • CAN controller access

  • second stage bootloader for starting GOAL application from xSPI0

Upcoming features:

Components

LEDs

The user LEDs 0…3 are used by GOAL for visual interaction. They can be set by calling goal_targetSetLeds(). Reading the current LED state is possible by goal_targetGetLeds().

LEDs can also be accessed via GOAL LED API.

Memory

The general RZ/T2M memory map is shown in following table. The addresses indicates the maximal reserved memory by linker files.

Address

Size

Region

Usage

Address

Size

Region

Usage

0x0010_0000 - 0x0010_7FFF

32k

BTCM

Second stage bootloader: used during startup to load GOAL application from xSPI0 flash into RAM.

0x3000_0000 - 0x3019_FFFF

2000k

Mirror area of System RAM

CPU0 GOAL

0x301A_0000 - 0x301B_FFFF

131k

Mirror area of System RAM

Shared noncache buffer

0x301C_0000 - 0x301E_FFFF

131k

Mirror area of System RAM

Noncache buffer

0x6000_0000 - 0x6000_004B

75b

External address space xSPI0

Parameter for the first stage bootloader

0x6000_004C - 0x6000_804B

32k

External address space xSPI0

Second stage bootloader image

0x6008_0000 - 0x6008_FFFF

64k

External address space xSPI0

Loader Table of second stage bootloader (16b in use)

0x6010_0000 - 0x602F_FFFF

2000k

External address space xSPI0

section of GOAL image 0

0x63FF_E000 - 0x63FF_FFFF

8k

External address space xSPI0

CPU0 GOAL CM variables

Non-Volatile-Memory

Configuration or user data can be storage to nonvolatile memory. GOAL supports the following two different mediums on RZ/T2M RSK to keep information remanent. Both are accessed via GOAL media for nonvolatile storage.

sFlash

A 512 Mbit sflash is assembled at the RZ/T2M RSK and mapped to external address space xSPI0. The last 8kByte within this memory are reserved for CM storage by default.

EEPROM

This feature is disabled by default and not available for library demos.

GOAL CM variables are stored to EEPROM by setting compiler define GOAL_CONFIG_NVS_EEPROM_I2C to 1.

This is possible via IDE project properties.

There are various limitations for this feature:

  • EEPROM size is limited to 2kBytes on RSK board; but some GOAL projects (e.g. PNIO including SNMP and MRP) requiring 8kBytes and are consequently not supported.

  • There is only a single EEPROM on RSK board available; this component is occupied by EtherCAT Slave Controler on EtherCAT projects and therefore not available for CM storage.

  • I2C module needs to be setup in 7-Bit address mode.

Comparison of sFlash and EEPROM

Following table shows the average performance of storing data into NVS.

timing for 1228 bytes

EEPROM (I2C)

SFLASH (xSPI0)

timing for 1228 bytes

EEPROM (I2C)

SFLASH (xSPI0)

read

110ms

0,014 ms

write

764ms

195 ms

Switches and buttons

Buttons SW1, SW2 and the DIP switches SW3:1 .. SW3:8 can be used as input signal to GOAL software. Their state is polled when calling goal_targetGetButtons(). The function returns the input state as a bit mask, which assign is specified in goal_target_board.h.

Bit2

31..10

9..2

1

0

Switch/button

<unsused>

SW3:8 .. SW3:1

SW2

SW1

UART

UART0 is used by GOAL as serial interface for sending log messages or receiving Command line interface. The interface speed is 115200 by default.

Tracing

Data tracing is possible by GOAL API via following pins. They must be setup as output mode by FSP Configuration Tool. In goal_target_board.h, the PINs are linked to GOAL.

GOAL TRACE ID

mapped to

PIN

GOAL TRACE ID

mapped to

PIN

GOAL_MA_TRACE_USER_0

IOPORT_PORT_21_PIN_2 (BSP_IO_PORT_21_PIN_2)

CN3 - PIN18

GOAL_MA_TRACE_USER_1

IOPORT_PORT_21_PIN_3 (BSP_IO_PORT_21_PIN_3)

CN3 - PIN15

GOAL_MA_TRACE_USER_2

IOPORT_PORT_21_PIN_4 (BSP_IO_PORT_21_PIN_4)

CN3 - PIN16

GOAL_MA_TRACE_USER_3

IOPORT_PORT_21_PIN_7 (BSP_IO_PORT_21_PIN_7)

CN3 - PIN7

GOAL_MA_TRACE_USER_4

IOPORT_PORT_22_PIN_0 (BSP_IO_PORT_22_PIN_0)

CN8 - PIN8

Tools

These software tools are required to run GOAL and its network protocol stacks on RZ/T2M-RSK. You may choose between e² studio or IAR Embedded Workbench.

Please ensure to use the correct IDE and FSP version! If the any of the required software version is not available anymore at Renesas Website, please contact Renesas Support.

Running a sample project

Handling a sample project on RZ/T2M-RSK is described in following sections. This includes the process of loading software into RAM for debugging and flashing it to non-volatile storage.

Setup RZ/T2M-RSK

Before running a sample project on Renesas RZ/T2M-RSK, ensure to setup the board correctly. This chapter summary most important components, which are used by GOAL. A detailed explanation of each unit is available in Renesas Starter Kit+ for RZ/T2M User’s Manual at Renesas RZ/T2M-RSK.

All important components for handling GOAL on RZ/T2M-RSK are marked below.

image-20250604-193449.png

 

The following configuration is used as default.

DIP-Switch

1

2

3

4

5

6

7

8

9

0

DIP-Switch

1

2

3

4

5

6

7

8

9

0

SW6

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

OFF

SW4

On

On

On

On

On

OFF

OFF

OFF

-

-

SW5

OFF

OFF

On

OFF

On

OFF

OFF

OFF

On

OFF

Reference

Jumper Position

Explanation

Reference

Jumper Position

Explanation

CN8

Sort 2-3

Using qSPI0 Serial Flash

CN17

Sort 2-3

Using VCC1833_4 domain at 1.8V

CN18

Sort 1-2

Using all three ports in the same PHY mode

CN19

Sort 1-2

Using all three ports in the same PHY mode

CN20

Sort 1-2

Using all three ports in the same PHY mode

J9

Short/ Open

Using external/ internal debugger

  • plug DC Power In (USB Type-C) for power supply

  • plug USB to Serial Port for serial communication

    • After powering on the board, check the hardware manager for the assigned COM interface.

    • The interface speed is 115200 by default.

  • plug ETH0 .. ETH2 for network communication

Board components are designed and configured by FSP Smart Configurator. The tool generates the source files of low level drivers, which are used by GOAL.

Second stage bootloader

The RZ/T2M-RSK offers a Boot Function, which loads a program from flash to BTCM and execute it. Due to the size limitation of 56KB it is usable for very small applications only. More details about the RZ/T2M Boot Function are available at Renesas Document RZ/T2M Group User’s Manual: Hardware - Chapter “Operating Mode Descriptions”.

 

Handling applications larger than 56KB requiring a second stage bootloader, that copies the GOAL image from flash to System RAM and executes it there.

When the device is powered up, the second stage bootloader is loaded from flash into BTCM by Boot Function. The following steps are then performed.

  1. Turn on LED0 to indicate start of second stage bootloader

  2. validating GOAL firmware image on flash and copy it into RAM. Blink LED1 once on success.

  3. Turn on LED1 (LED0 is still enabled) for 1 second to indicate end of second stage bootloader

All LED states are listed in table below.

LED0

LED1

Description

LED0

LED1

Description

ON

-

running second stage bootloader

ON

Blinking once

a firmware image for core 1 has been copied from flash to RAM successfully

ON

ON

This state takes ~1s and signals the end of second stage bootloader.

Blinking fast

Blinking fast

Infinite state. No valid firmware image has been detected.

RZ/T2M-RSK with IAR Workbench

GOAL projects for IAR Workbench are located at projects/<protocol>/<application>/iar/renesas/rzt2m_rsk*/rzt2m_rsk*.eww.

Adding FSP Smart Configurator to IAR Workbench

Before first use, the Smart Configurator needs to be added as external tool in IAR Workbench once by following steps:

  • open IAR Workbench IDE and select Tools → Configure Tools…

  • add a new tool by choosing New and enter the following properties

    • Menu Text: FSP Smart Configurator

    • Command1: C:\Renesas\fsp_sc\eclipse\rasc.exe
      1: Absolute path to the Flexible Software Package Smart Configurator.

    • Argument: --compiler IAR configuration.xml

    • Initial Directory: $PROJ_DIR$

Setup Board for debugger as followed.

  • connect I-Jet to external debugger (MIPI-20) Connector

  • short J9 for usage of external debugger

Code generation by FSP Smart Configurator

The FSP Smart Configurator is used for board setup. Each GOAL project is preconfigured for RZ/T2M-RSK. The driver files and configuration files must be generated manually before building IAR projects, otherwise it will fail. Customer’s modification by FSP Smart Configurator is possible.

FSP Configuration do not cover all GOAL setting. Some modifications must still be done in GOAL.

Generating the FSP sources is required, even in library (demo) projects.

  • open an example projects in IAR Workbench (see section below for project import description).

  • choose a Workspace from the selector or via context menu → Set as Active

    • *_ram - Debug: RAM configuration of the application

      *_ram - Release: xspi0 configuration of the application

    • *_bootloader - xspi0: second stage bootloader for starting any application from qSPI0 flash

image-20250618-072927.png
  • select Tools → FSP Smart Configurator from the menu to open FSP Smart Configurator

    • (optional) choose device family: Renesas RZ/T

    • a preconfigured project for the Smart Configurator is loaded and ready to use

  • press Generate Project Content to generate FSP sources

Debugging GOAL application on RZ/T2M-RSK with IAR Workbench

  • setup board

  • Short J9 for external Debugger

  • Connect I-Jet to External Debugger Connector

  • open an example projects in IAR Workbench

  • select Workspace: *_ram - Debug

  • open and generate board by FSP Configuration as described in section Code generation by FSP Smart Configurator

  • select Project → Rebuild All to build the project

  • select Project → Download and Debug to download the project into RAM and start the debug session

Flashing second stage bootloader to RZ/T2M-RSK with IAR Workbench

  • setup board

  • Short J9 for external Debugger

  • Connect I-Jet to External Debugger Connector

  • open an example projects in IAR Workbench

  • select Workspace: *_bootloader - xspi0

  • open and generate board by FSP Configuration as described in section Code generation by FSP Smart Configurator

  • select Project → Rebuild All to build the project

  • select Project → Download and Debug to download the project into qSPI0 and start the debug session

Flashing GOAL application to RZ/T2M-RSK with IAR Workbench

  • ensure that the second stage bootloader has been flashed

  • setup board

  • Short J9 for external Debugger

  • Connect I-Jet to External Debugger Connector

  • open an example projects in IAR Workbench

  • select Workspace: *_ram - Release

  • open and generate board by FSP Configuration as described in section Code generation by FSP Smart Configurator

  • select Project → Rebuild All to build the project

  • select Project → Downlaad → Download file...

  • navigate into the IAR project directory, open the subfolder Release/Exe and select All Files (*.*)

image-20250708-063723.png
  • choose the firmware hex file *.qspi.fw.hex and confirm for downloading the file into flash

RZ/T2M-RSK with e2studio

GOAL projects for e2studio are located at projects/<protocol>/<application>/e2studio/renesas/rzt2m_rsk*/

Extend default board setup by debugger as followed.

  • connect Mico-USB to internal debugger (Micro-USB) connector J10

  • open J9 for usage of internal debugger

Import GOAL projects into e2studio

  • open e2studio for RZ/T2M

  • importing a new project is possible by selecting File → Import and choosing Existing Project into Workspace.

  • Select root directory and Browse… into sub-directory projects of goal. All e2studio projects are listed and can be selected or deselected for import.

    • *_bootloader: second stage bootloader for starting any application from qSPI0 flash

    • *_ram: debug and release configuration of the application

  • Choose the *_ram and at least one *_bootloader project. Confirm by Finish.

Flexible Software Package in e2studio

Flexible Software Package is used for board configuration. Each GOAL project is preconfigured for RZ/T2M-RSK. Driver and configuration files are generated on build automatically. Customer’s modification is possible by following steps.

FSP Configuration do not cover all GOAL setting. Some modifications must still be done in GOAL.

  • Open configuration.xml lying in the project root (see section below for project import description).

  • The preconfiguration for the FSP Configuration is loaded and ready to use.

  • Press Generate Project Content to generate the FSP sources after modifications.

Note: There is a “FSP configuration” perspective available in e²studio. It can be enabled by Window → Perspective → Open Perspective → Other… and selecting FSP Configuration.

Debugging GOAL application on RZ/T2M-RSK with e2studio

  • import GOAL project as described in section Import GOAL projects into e2studio

  • (optional) configuring board by FSP Configuration as described in section Flexible Software Package in e2studio

  • select *_ram (in ram) project at Project Explorer

  • choose Debug configuration by Project → Build Configurations → Set Active → Debug

  • select Project → Build Project. FSP sources are generated and project is build.

  • navigate to Run → Debug configurations.. and select the Renesas GDB Hardware Debugging *_ram Debug

grafik-20250603-120840.png
  • click Debug to start the debug session

Flashing second stage bootloader to RZ/T2M-RSK with e²studio

GOAL Release configurations get only started if the second stage bootloader has been flashed once to the target.

  • import GOAL project as described in section Import GOAL projects into e2studio

  • select *_bootloader (in bootloader) project at Project Explorer

  • select Project → Build Project. FSP sources are generated and project is build.

  • navigate to Run → Debug configurations.. and select the Renesas GDB Hardware Debugging *_bootloader Release (xSPI0)

grafik-20250603-122737.png
  • click Debug to download the second stage bootloader

Flashing GOAL application to RZ/T2M-RSK with e²studio

The Release configuration creates a firmware-hex file from binary image, which can be flashed by e²studio. Python and python intelhex library are required for this process.

  • import GOAL project as described in section Import GOAL projects into e2studio

  • (optional) configuring board by FSP Configuration as described in section Flexible Software Package in e2studio

  • select *_ram (in ram) project at Project Explorer

  • choose Release configuration by Project → Build Configurations → Set Active → Release

  • select Project → Build Project. FSP sources are generated and project is build.

grafik-20250603-124318.png
  • navigate to Run → Debug configurations.. and select the Renesas GDB Hardware Debugging *_ram Release (xSPI0)

grafik-20250603-124106.png
  • click Debug to start the session

  • open context menu of download symbol (see picture below) and select the *_qspi.fw.hex [Image only, 0x0].

grafik-20250603-131054.png
  • download is initiate afterwards automatically

Downloads

GOAL Profinet Demo

A Profinet Demo will be available soon by following download.

The demo is temporarily unavailable. In urgent case, please contact service@port.de.

The ZIP includes a 1h time limited, full feature protocol stack with multiple example applications.

The GSDML is located at protos/pnio/gsdml.

All projects are created for Renesas RZ/T2M-RSK WS2.1. The board configuration is fixed in library projects and can not be modified by FSP SC.

Stack documentation and a Quick Start Guide is available at Documents & Manuals.

The software is under development and purposed for validation only.

GOAL Ethernet/IP Demo

A EtherNet/IP Demo will be available soon by following download.

The demo is temporarily unavailable. In urgent case, please contact service@port.de.

The ZIP includes a 1h time limited, full feature protocol stack with multiple example applications.

The soc device description is located in application sub-directory at appl/goal_eip/.

All projects are created for Renesas RZ/T2M-RSK WS2.1. The board configuration is fixed in library projects and can not be modified by FSP SC.

Stack documentation and a Quick Start Guide is available at Documents & Manuals.

The software is under development and purposed for validation only.

GOAL Modbus/TCP

The demo is temporarily unavailable. In urgent case, please contact service@port.de.

GOAL CC-Link IE Field Basic Demo

There is currently no library demo available for this protocol. If you are interested, please contact us at support@port.de.

GOAL CC-Link IE TSN Demo

There is currently no library demo available for this protocol. If you are interested, please contact us at support@port.de.

GOAL OPC-UA Demo

A OPC-UA Demo will be available soon by following download.

The demo is temporarily unavailable. In urgent case, please contact service@port.de.

The ZIP includes a 1h time limited, full feature protocol stack with multiple example applications.

The device application is located in sub-directory at appl/goal_opcua/.

All projects are created for Renesas RZ/T2M-RSK WS2.1. The board configuration is fixed in library projects and can not be modified by FSP SC.

Stack documentation and a Quick Start Guide is available at Documents & Manuals.

The software is under development and purposed for validation only.

GOAL Powerlink Demo

A Powerlink Demo will be available soon by following download.

The demo is temporarily unavailable. In urgent case, please contact service@port.de.

The ZIP includes a 1h time limited, full feature protocol stack with an example CN application.

All projects are created for Renesas RZ/T2M-RSK WS2.1. The board configuration is fixed in library projects and can not be modified by FSP SC.

The software is under development and purposed for validation only.

GOAL CANopen Demo

There is currently no library demo available for this protocol. If you are interested, please contact us at support@port.de.

Known issues

Slowed down software

The software is slowed down due to an internal bug, causing e.g. a delayed Ethernet or UART communication.

Bug fix

Open project configuration Project->Options…->General Options->Library Configuration->Library low-level interface implementation and select None.

 

USB-Device could not be detected

If Windows is unable to detect the USB-Device after power on please try following workaround:

  • power off the device

  • unplug external debugger and UART to serial port on PC side

  • power on the device

  • plug the external debugger and UART to serial port

 

Software development is still in progress. If any further issues are detected, please contact us.


In case of any specific questions, you can contact our support team via support@port.de.

You are interested in other protocols for this device? Please contact the sales team for commercial questions via service@port.de.

Jul 8, 2025