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Table of Contents | ||||||
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Introduction
Porting GOAL to Renesas RZ/N2L-RSK is in progress.
Information about the state of development, requirements, supported and upcoming features, resources and software handling are prospected in following chapters.
More information and documents are available at Renesas RZ/N2L-RSK.
Network protocols
The following network protocols are supported on RZ/N2L-RSK Arm® Cortex®-R52 single core.
Upcoming network protocols.
Please follow the links for detailed stack description.
In the first step of porting our network protocols to the new device, we focusing on single core solution only. Providing the multi-core versions of all network protocols is scheduled.
Features
FreeRTOS Kernel V10.3.0
Serial Interface for log messages
4 user LEDs (green, yellow + two red)
4 user DIP switches
2 user buttons
xSPI0 flash support for storing CM variables remanent
booting GOAL application from xSPI0
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Micro Core To Core on shared memory for multi-core solutions
Components
LEDs
The user LEDs 0…3 are used by GOAL for visual interaction. They can be set by calling goal_targetSetLeds(). Reading the current LED state is possible by goal_targetGetLeds().
LEDs can also be accessed via GOAL LED API.
Memory
The general RZ/N2L memory map is shown in following table. The addresses indicates the maximal reserved memory.
Address | Size | Region | Usage |
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0x0010_0000 - 0x0010_7FFF | 32k | BTCM | Second stage bootloader: used during startup to load GOAL application from QSPI0 flash into RAM. |
0x3000_0000 - 0x3017_FFFF | 1500k | Mirror area of System RAM | CPU0 GOAL (max. occupied: 800kByte) |
0x3016_0000 - 0x3016_FFFF | 64k | Mirror area of System RAM | Shared noncache buffer |
0x3017_0000 - 0x3017_FFFF | 64k | Mirror area of System RAM | Noncache buffer |
0x6000_0000 - 0x6000’004b | 75b | External address space xSPI0 | Parameter for the bootloader |
0x6000_004c - 0x6000_804b | 32k | External address space xSPI0 | Second stage bootloader image |
0x6008_0000 - 0x6008_FFFF | 64k | External address space xSPI0 | CPU0 Loader Table |
0x6010_0000 - 0x6027_FFFF | 1500k | External address space xSPI0 | CPU0 GOAL image (max. occupied: 800kByte) |
0x67FF_E000 - 0x67FF_FFFF | 8k | External address space xSPI0 | CPU0 GOAL CM variables |
Switches and buttons
The DIP switches SW3:1..SW3:4 and buttons SW1 & SW2 can be used as input signal to GOAL software. Their state is polled when calling goal_targetGetButtons(). The function returns the input state as a bit mask, which assign is specified in goal_target_board.h.
Bit | 31..6 | 5 | 4 | 3 | 2 | 1 | 0 |
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Switch/button | <unsused> | SW2 | SW1 | SW3:4 | SW3:3 | SW3:2 | SW3:1 |
UART
UART0 is used by GOAL as serial interface for sending log messages or receiving Command line interface. The interface speed is 115200 by default.
Tracing
Data tracing is possible by GOAL API via following pins.
GOAL TRACE ID | mapped to | PIN |
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GOAL_MA_TRACE_USER_0 | IOPORT_PORT_21_PIN_2 (BSP_IO_PORT_21_PIN_2 | CN3 - PIN18 |
GOAL_MA_TRACE_USER_1 | IOPORT_PORT_21_PIN_3 (BSP_IO_PORT_21_PIN_3) | CN3 - PIN15 |
GOAL_MA_TRACE_USER_2 | IOPORT_PORT_21_PIN_4 (BSP_IO_PORT_21_PIN_4) | CN3 - PIN16 |
GOAL_MA_TRACE_USER_3 | IOPORT_PORT_21_PIN_7 (BSP_IO_PORT_21_PIN_7) | CN3 - PIN7 |
GOAL_MA_TRACE_USER_4 | IOPORT_PORT_22_PIN_0 (BSP_IO_PORT_22_PIN_0) | CN3 - PIN8 |
Tools
These software tools are required to run GOAL and its network protocol stacks on RZ/N2L-RSK. You may choose between e² studio or IAR Embedded Workbench.
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IAR Embedded Workbench Version 9.30.1
EWARM Patch for RZ/N2L rev1.1 (available at Renesas RZ/N2L RSK)RZ/N2L FSP Smart Configurator and FSP Installer (for IAR Embedded Workbench) v1.02.0 (available at Renesas RZ/N2L-RSK), the installer includes following software
RZ/N Flexible Software Package (FSP) v.1.02.0
RZ/N FSP Smart Configurator 2022-07 v1.0ConfiguratorVersion: 2023-04 (23.4.0)
e² studio and RZ/N2L FSP Installer v1.02.0 (available at Renesas RZ/N2L-RSK)
Running a sample project
Handling a sample project on RZ/N2L-RSK is described in following sections. This includes the process of loading software into RAM for debugging and flashing it to non-volatile storage.
Setup RZ/N2L-RSK
Before running a sample project on Renesas RZ/N2L-RSK, ensure to setup the board correctly. This chapter summary most important components, which are used by GOAL. A detailed explanation of each unit is available in Renesas Starter Kit+ for RZ/N2L User’s Manual at Renesas RZ/N2L-RSK.
All important components for handling GOAL on RZ/N2L-RSK are marked below.
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The following configuration is used as default.
DIP-Switch | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 0 |
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SW1 | On | Off | Off | Off | Off | Off | Off | Off | Off | Off |
SW4 | On | On | On | On | Off | Off | On | Off | - | - |
SW8 | Off | On | Off | On | Off | Off | Off | Off | Off | Off |
Reference | Jumper Position | Explanation |
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CN8 | Sort 2-3 | Using QSPI0 Serial Flash |
CN20 | Sort 1-2 | Using all three ports in the same PHY mode |
CN21 | Sort 1-2 | Using all three ports in the same PHY mode |
CN22 | Sort 1-2 | Using all three ports in the same PHY mode |
CN24 | Sort 2-3 | Using VCC1833_4 domain at 1.8V |
J9 | Short/ Open | Using external/ internal debugger |
plug USB to Serial Port for serial communication
After powering on the board, check the hardware manager for the assigned COM interface.
The interface speed is 115200 by default.
plug DC Power In (USB Type-C) for power supply
plug ETH0..ETH2 for network communication
Board components are designed and configured by Flexible Software Package (FSP) | Renesas Smart Configurator. The tool generates the source files of low level drivers, which are used by GOAL.
RZ/N2L-RSK with IAR Workbench
GOAL example projects for IAR Workbench is located at projects/<protocol>/<application>/iar/renesas/rzn2l_rsk*/rzn2l_rsk*.eww.
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connect I-Jet to external debugger (MIPI-20) Connector
short J9 for usage of external debugger
Flexible Software Package in FSP Smart Configurator
Flexible Software Package is used for board configuration. Each GOAL project is preconfigured for RZ/N2L-RSK. The files must be generated manually before building IAR projects. Customer’s modification by FSP Smart Configurator is possible.
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open an example projects in IAR Workbench (see section below for project import description).
choose a Workspace from the selector or via context menu → Set as Active
rzn2l_rsk_ram - Single-Core for Debug
rzn2l_rsk_bootloader - Bootloader-ROM for flashing
select Tools → FSP Smart Configurator from the menu to open Flexible Software Package (FSP) | Renesas
(optional) choose device family: Renesas RZ/N
a preconfigured project for the Smart Configurator is loaded and ready to use
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press Generate Project Content to generate FSP sources
Debugging RZ/N2L-RSK with IAR Workbench
setup board
open an example projects in IAR Workbench
select Workspace rzn2l_rsk_ram - Single-Core
generate project content with FSP Smart Configurator (see section above)
select Project → Rebuild All to build the project
power up the board
press S3 to reset the board
select Project → Download and Debug to download the project into RAM and start the debug session
Flashing RZ/N2L-RSK with IAR Workbench
setup board
open an example projects in IAR Workbench
build RAM binary (see section above)
select Workspace rzn2l_rsk_bootloader - Bootloader-ROM
generate project content with FSP Smart Configurator (see section above)
select Project → Rebuild All to compile the project
power up the board
select Project → Download → Download active application to flash the second stage bootloader and RAM binary into xSPI0
Source and destination sections are defined in the linker file.press S3 to reset the board
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Debugging the second stage bootloader and its RAM binary is possible. But debug information of sflash’s RAM binary have to be included first. Therefore, open options of Bootloader workspace via Project → Options. Navigate to Debugger → Images and check the first box to Download extra image. Note, that Debug info only is enabled.
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RZ/N2L-RSK with e2studio
GOAL example projects for e2studio is located at projects/<protocol>/<application>/e2studio/renesas/rzn2l_rsk*/
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connect Mico-USB to internal debugger (Micro-USB) connector J10
open J9 for usage of internal debugger
Flexible Software Package in e2studio
Flexible Software Package is used for board configuration. Each GOAL project is preconfigured for RZ/N2L-RSK. The files will be generated on build automatically. Customer’s modification is possible by following steps.
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Note: There is a “FSP configuration” perspective available in e²studio. It can be enabled by Window → Perspective → Open Perspective → Other… and selecting FSP Configuration.
Debugging RZ/N2L-RSK with e2studio
setup board
open e2studio for RZ/N2L
importing a new project is possible by selecting File → Import and choosing Existing Project into Workspace.
Select root directory and Browse… into sub-directory projects of goal. All e2studio projects are listed and can be selected or deselected for import. Choose at least the *_ram version. Even if the *_bootloader version is not required for debugging, it is recommended to select it too in case the firmware should be flashed later on. Confirm by Finish.
Optional: configuring board by FSP Configuration
select the (in ram) project at Project Explorer and choose Project → Build Project. FSP sources are generated and project is build.
click the bug symbol at the upper right corner while (in ram) project is highlighted to start debug session.
Flashing RZ/N2L-RSK with e²studio
setup board
open e2studio for RZ/N2L
importing a new project is possible by selecting File → Import and choosing Existing Project into Workspace.
Select root directory and Browse… into sub-directory projects of goal. All e2studio projects are listed and can be selected or deselected for import. Choose *_ram and *_bootloader version of the project. Confirm by Finish.
Optional: configuring board by FSP Configuration
select the (in ram) project at Project Explorer and choose Project → Build Project. FSP sources are generated and project is build.
select the (in bootloader) project at Project Explorer and choose Project → Build Project. FSP sources are generated and project is build including the RAM binary.
power up the board
click the bug symbol at the upper right corner while (in bootloader) project is highlighted to flash the target and start debugging the bootloader.
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When the device is powered up, the bootloader switches LED0 on to indicate application program copy start. After GOAL has been copied from xSPI0 flash to RAM, LED3 indicates application program copy end.
Downloads
GOAL Profinet Demo
A Profinet Demo is available by following download. The ZIP includes a 3h 1h time limited, full feature protocol stack library, next to some basic (00410) and web-server (goal_http) examples.
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All projects are created for Renesas RZ/N2L-RSK. The board configuration is fixed in library projects and can not be modified by FSP SC.
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The software is under development and purposed for validation only.
>> download Profinet Demo for RZ/N2L-RSK (Date of update: 3129.0109.2023)
GOAL Ethernet/IP Demo
A EtherNet/IP Demo is available by following download. The ZIP includes a 3h 1h time limited, full feature protocol stack, next to some basic (00410) and web-server (goal_http) examples.
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All projects are created for Renesas RZ/N2L-RSK. The board configuration is fixed in library projects and can not be modified by FSP SC.
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The software is under development and purposed for validation only.
>> download Ethernet/IP Demo for RZ/N2L-RSK (Date of update: 31.01.2023)
GOAL Modbus/TCP
The Modbus TCP/IP Software is available by following download.
All projects are created for Renesas RZ/N2L-RSK.
Application description is available at Application Examples.
>> download Modbus/TCP for RZ/N2L-RSK (Date of update: 3129.0109.2023)
GOAL OPC-UA Demo
A OPC-UA Demo is available by following download. The ZIP includes a 3h 1h time limited, full feature protocol stack, next to some basic (00410) and web-server (goal_http) examples.
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All projects are created for Renesas RZ/N2L-RSK. The board configuration is fixed in library projects and can not be modified by FSP SC.
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The software is under development and purposed for validation only.
>> download OPC-UA for RZ/N2L-RSK (Date of update: 0629.0309.2023)
Known
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issues
USB-Device could not be detected
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power off the device
unplug external debugger and UART to serial port on PC side
power on the device
plug the external debugger and UART to serial port
Software development is still in progress. If any further issues are detected, please contact us.
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In case of any specific questions, you can contact our support team via support@port.de.
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