Development board

The following image shows the development target board.

GOAL > GOAL - NXP RT1180 > 43717711-7e04-4298-b0de-f7c42a356461.jpeg

Following interfaces are significant for the package:

Port	Function	Remarks
ENET0	First switch port	disabled by default
ENET1	Second switch port	enabled by default
ENET2	Third switch port	enabled by default
ENET3	Fourth switch port	disabled by default
DC IN 5V	Power supply
MCU Link DEBUG USB	Serial interface for logging	For development the MCU Link firmware was replaced with JLINK firmware provided by SEGGER. The interface provides, beside the debugging interface, a serial interface with the following settings: Baudrate: 115200 kBit/s Flow Control: OFF This interface is not required for firmware update, only for optional serial logging.
USB	Bootloader interface	The lower USB port (label USB_OTG1) is required for flashing the firmware.

Building and deploying a firmware

Available build targets

Target	description	remarks
`nxp_evkmimxrt1180_bm_flash`	flash image based on bare metal, no operating system	in the bare-metal configuration all code is run in a super loop. Some hardware specific code is run in interrupts.
`nxp_evkmimxrt1180_bm_ram`	ram based image for bare metal, no operating system	same applies as for the bare metal flash image since code needs to fit into RAM beside the data, not all example applications can be run with this configuration purpose is debugging during implementation
`nxp_evkmimxrt1180_rtos_flash`	flash image based on FreeRTOS	all code is run in tasks, some minimal functionality is processed in interrupts
`nxp_evkmimxrt1180_rtos_ram`		same applies as for the FreeRTOS flash image since code needs to fit into RAM beside the data, not all example applications can be run with this configuration purpose is debugging during implementation

Requirements

In order to build the examples, a Linux machine with the following installations is required:

sudo apt-get install build-essential
sudo apt-get install python3
sudo apt-get install python-is-python3
sudo apt-get install python3-pip
sudo pip install spsdk

Beside that a toolchain is required:

sudo apt-get install gcc-arm-none-eabi

Unpacking the delivery

The archive should be unpacked into a dedicated folder, e.g.:

> mkdir rt1180_pnio
> cd rt1180_pnio
> unzip ../2_23_0_00410_PORT_evkmimxrtl1180_profinet.zip

Folder structure of the delivery

Folder	content
appl	source of example applications
bsp	bsp for target platform
ext	external 3rd party software components
goal	goal framework
goal_media	goal framework interfaces
licenses	licenses of 3rd party software
plat	platform specific drivers
projects	Makefiles for example applications
protos	protocol stacks
tools	build system tools

Building an example application

To build example applications, the following steps need to be done in the specific project folder:

Entering the example directory

> cd projects/goal_pnio/24_pnio_snmp_mrp/gcc

Choosing the build platform

> make select

No platform selected, choose a platform - OR - press <CTRL+c> and set the
PLATFORM environment variable.

Choose platform:
  [1] nxp_evkmimxrt1180_bm_flash      (gcc,gdb,jlink)
  [2] nxp_evkmimxrt1180_bm_ram        (gcc,gdb,jlink)
  [3] nxp_evkmimxrt1180_rtos_flash    (gcc,gdb,jlink)
  [4] nxp_evkmimxrt1180_rtos_ram      (gcc,gdb,jlink)

Choice [1-4]: 3

Selected platform: [3] nxp_evkmimxrt1180_rtos_flash

Building

When compiling, a call of the Build-Tool make is sufficient. However, a toolchain needs to be provided using a parameter:

make CROSS=<toolchain>

The prefix specifies which compiler / linker / debugger is called by the make system. If the compiler is not within the search path, the full path needs to be specified, e.g:

# assume the gcc toolchain is located in /opt/toolchain/arm-none-eabi-13.1
make CROSS=/opt/toolchain/arm-none-eabi-13.1/bin/arm-linux-gnueabi-

If everything works as expected, an elf file is generated and the following log messages are shown:

Platform selected by .platform file: nxp_evkmimxrt1180_rtos_flash

....
....
....
....
[CC] plat/drv/eth/nxp/netc/goal_target_eth.c
[LD] projects/goal_pnio/24_pnio_snmp_mrp/gcc/build/nxp_evkmimxrt1180_rtos_flash/goal_nxp_evkmimxrt1180_rtos_flash.elf
[LD] Memory region         Used Size  Region Size  %age Used
[LD] m_interrupts_ram:          0 GB         0 GB
[LD]   m_flash_config:          0 GB         3 KB      0.00%
[LD]            m_ivt:          0 GB         4 KB      0.00%
[LD]     m_interrupts:          1 KB         1 KB    100.00%
[LD]           m_text:      330308 B     16339 KB      1.97%
[LD]           m_data:      120864 B       128 KB     92.21%
[LD]         m_ncache:          0 GB         0 GB
[LD]           m_heap:          0 GB         0 GB
[LD]          m_data2:       19364 B       512 KB      3.69%
[LD]          m_data3:        256 KB       256 KB    100.00%
[LD]         m_qacode:         39 KB       128 KB     30.47%

Creating flash image

Within the same folder using the following command, the flashable image can be generated:

make CROSS=arm-none-eabi- target_pre_run

Preparing the board for flashing

Firmware update mode requires the following configuration on the dip switches of the board regarding boot mode:

Switch	Mode
1	OFF
2	OFF
3	OFF
4	ON

DIP-Switch configuration SW5

After correct setting of the DIP-Switches a reset is required. There is a reset button right beside the POWER switch.

Flashing

note

If firmware update is executed in a virtual machine, please consider that during firmware update (once the flash loader is loader) the USB device changes (vendor id and product id). Thus 2 USB devices need to be configured to be connected to the virtual machine.

First USB device:
- vid: 1fc9, pid: 014c, rev: 0002, name: NXP SEMICONDUCTORS OO Blank RT Family [0002]
Secondary USB device:
- vid: 15a2, pid: 0073, rev: 0073, name: FREESCALE SEMICONDUCTOR INC. USB COMPOSITE DEVICE [0002]

If firmware update is executed in a virtual machine, please consider that during firmware update (once the flash loader is loader) the USB device changes (vendor id and product id). Thus 2 USB devices need to be configured to be connected to the virtual machine.

First USB device:
- vid: 1fc9, pid: 014c, rev: 0002, name: NXP SEMICONDUCTORS OO Blank RT Family [0002]
Secondary USB device:
- vid: 15a2, pid: 0073, rev: 0073, name: FREESCALE SEMICONDUCTOR INC. USB COMPOSITE DEVICE [0002]

note

To add these devices, add filters under device->usb->usb settings by using the “plus” button. Since the devices switch during flashing, they need to be caught during this process:

connect the board
catch 1st USB device as filter
try flashing – do not reset the board
catch 2^nd USB device as filter

The user needs rights to access USB devices, it is recommended to use root.

To add these devices, add filters under device->usb->usb settings by using the “plus” button. Since the devices switch during flashing, they need to be caught during this process:

connect the board
catch 1st USB device as filter
try flashing – do not reset the board
catch 2^nd USB device as filter

The user needs rights to access USB devices, it is recommended to use root.

note

In some VM ware product versions it is enough to set "Connect device to foreground VM(M)", so that all USB device are automatically connected.

At first a Reset of the CPU is required. Perform this using the reset switch on the board.

note

For simplification performing of the firmware update required administrative rights, thus the make command needs to be performed with sudo. The alternative is configuration of udev to allow users to access raw usb devices using usblib.

The following command programs the firmware:

# might to needed to call with sudo
> make CROSS=arm-none-eabi- target_run

If programming of the firmware is successful, the following log is shown:

> make CROSS=arm-none-eabi- target_run
# Load flashloader
blhost -t 50000 -u 0x1fc9,0x014c -- get-property 1
Response status = 0 (0x0) Success.
Response word 1 = 1258487809 (0x4b030001)
Current Version = K3.0.1
blhost -t 50000 -u 0x1fc9,0x014c -- load-image flashloader_cm33.bin
Loading image  [####################################]  100%
Response status = 0 (0x0) Success.
sleep 2
# Ping RT1180
blhost -t 50000 -u 0x15A2,0x0073 -- get-property 1
Response status = 0 (0x0) Success.
Response word 1 = 1258424320 (0x4b020800)
Current Version = K2.8.0
# Configure nor flash
blhost -t 50000 -u 0x15A2,0x0073 -- fill-memory 0x20000000 4 0xcf900001
Response status = 0 (0x0) Success.
blhost -t 50000 -u 0x15A2,0x0073 -- configure-memory 9 0x20000000
Response status = 0 (0x0) Success.
blhost -t 50000 -u 0x15A2,0x0073 -- fill-memory 0x20000000 4 0xc0000007
Response status = 0 (0x0) Success.
blhost -t 50000 -u 0x15A2,0x0073 -- configure-memory 9 0x20000000
Response status = 0 (0x0) Success.
# Erase flash
blhost -t 50000 -u 0x15A2,0x0073 -- flash-erase-region 0x38000000 0xA0000
Response status = 0 (0x0) Success.
blhost -t 50000 -u 0x15A2,0x0073 -- read-memory 0x38000000 16
Reading memory  [####################################]  100%
ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
Response status = 0 (0x0) Success.
Response word 1 = 16 (0x10)
Read 16 of 16 bytes.
# Add FDCB_XIP used, if just want to write flash, comment this section
blhost -t 50000 -u 0x15A2,0x0073 -- fill-memory 0x20000000 4 0xf000000f
Response status = 0 (0x0) Success.
blhost -t 50000 -u 0x15A2,0x0073 -- configure-memory 9 0x20000000
Response status = 0 (0x0) Success.
# Write XMCD
#blhost -t 50000 -u 0x15A2,0x0073 -- write-memory 0x38000800
# Write Image
blhost -t 50000 -u 0x15A2,0x0073 -- write-memory 0x38001000 goal_nxp_evkmimxrt1180_bm_flash_boot.bin
Writing memory  [####################################]  100%
Response status = 0 (0x0) Success.
Response word 1 = 174048 (0x2a7e0)
# Read Image
blhost -t 50000 -u 0x15A2,0x0073 -- read-memory 0x38001000 0x400
Reading memory  [####################################]  100%
00 a0 00 87 00 00 00 00 00 00 00 01 90 00 00 00
00 a0 00 00 e0 07 02 00 00 b0 00 38 00 00 00 00
00 b0 00 38 00 00 00 00 13 02 00 00 00 00 00 00
4f 89 6e a3 66 32 60 63 16 d2 3e c5 59 2a 6d 23
b4 b3 f0 18 79 bf d7 30 cc a8 60 6b d0 55 a9 ad
21 16 eb cf dd f3 6f cd d0 85 bf 9c 20 8d 7a 18
db 53 5a d9 fe 0f 3e 54 6b b6 2a 49 74 36 44 a7
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 10 00 90 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
Response status = 0 (0x0) Success.
Response word 1 = 1024 (0x400)
Read 1024 of 1024 bytes.
# starting GDB

The script tries to run GDB, however this can be quit using Ctrl-D or typing “quit”.

Booting the firmware

Boot mode requires the following configuration on the dip switches of the board regarding boot mode:

Switch	Mode
1	OFF
2	ON
3	OFF
4	OFF

DIP-Switch configuration SW5

After correct setting of the DIP-Switches a reset is required. There is a reset button right beside the POWER switch.

Enable logging

By default, the binary is build without logging. If wished, this can be enabled. Please execute the following command within the project folder:

make log

This will add additional lines to the goal_config.h header file of the application being built.

diff --git a/appl/goal_pnio/24_pnio_snmp_mrp/goal_config.h b/appl/goal_pnio/24_pnio_snmp_mrp/goal_config.h
index 21ea7cba9..db0913c59 100644
--- a/appl/goal_pnio/24_pnio_snmp_mrp/goal_config.h
+++ b/appl/goal_pnio/24_pnio_snmp_mrp/goal_config.h
@@ -16,4 +16,7 @@
 #ifndef GOAL_CONFIG_H
 #define GOAL_CONFIG_H

+#define GOAL_CONFIG_LOGGING 1
+#define GOAL_CONFIG_LOGGING_TARGET_RAW 1
+
 #endif /* GOAL_CONFIG_H */

If the application is build now, an image with logging enabled is generated. Log messages will be put out on the USB UART (see chapter "Development Board”).